Draw 2D and 3D semiconductor devices and fabrication processes with CeTZ, including patterned geometry loaded from GDS.
#import "@preview/mesa:0.1.0" as semi
#set page(width: auto, height: auto, margin: 8mm)
#let sample = {
import semi: *
layer(
"substrate",
thickness: 30,
material: "substrate",
label: [Si],
)
layer(
"oxide",
thickness: 5,
material: "dielectric",
label: [SiO#sub[2]],
)
layer(
"gate",
thickness: 15,
material: "metal",
label: [Al],
)
}
#semi.layer-stack(
sample,
camera: (azimuth: 35deg, elevation: 35deg),
shading: "fancy",
)

GDS layouts can also be used to produce process-flow steps.

See the usage manual for the complete API.
DISCLAIMER: >80% of Typst code and 100% of Rust code was LLM-written, guided by me at a high level. I’m not fluent in Rust and I couldn’t have justified writing this package otherwise. Since this is only a visualization tool, I felt that vibe coding it could be justified. Nonetheless, I have been using it for my own projects and have been happy with the results.
In case of any bugs or missing features, please open an issue on GitHub.
Changelog
0.1.0
Initial release